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Raed Ibrahim Idris King Talal St. 37, Jenin, WestBank, Palestine. +970 59 716454 |
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OBJECTIVE: |
A Full-time position in Computer Engineering with the potential for advancement. |
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EDUCATION: |
1. B.Sc. In Computer Engineering from the Technical University of Budapest "TUB", Budapest-Hungary. The graduation project was about Image processing in pixel level using a workstation which was built for that purpose in the Hungarian Physics Institute "KFKI". Graduated in 1994. 2. M.Sc. in Computer Engineering from the Arab Academy for Science and Technology "AAST" Alexandria Egypt, Concentration: Parallel Processing and Computer Networks. My thesis work was about the reliable router for a grid of processors. Graduated in 2000. |
EXPERIENCE:
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Feb2001-Present |
Al-Quds Open University-Palestine, Jenin, WestBank, Palestine. Position: Lecturer. Currently I am a lecturer at Al-Quds Open University, Department of Computer Science. Courses taught by me: · Introduction to Computer. · Using PC in administration "Software Packages". · Computer applications "Software Packages". · Systems analysis and design. · Software Engineering. · Artificial intelligence and expert systems. · Introduction to Programming languages "Pascal". · Computer Graphics. |
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Jun1997-Jul2000
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INTECH Intelligent Technology, Alexandria, Egypt. Position: Engineer. The Scope of work concerned the following areas: · Assembling new PC's. · Dealing with hardware and software problem "Technical Support". · Computer networks planning and building (LAN, WAN). · Internet Web Pages Design and Implementation. Address: 12, Ibrahim Sharief St. Mustafa Kamel Alexandria, Egypt |
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Oct1995-Apr1997 |
PIPECO for Industry and Trading Plastics, Cairo, Egypt. Position: Engineer. Responsibilities included the help desk, maintaining the computer controlled equipments of the factory, and I was involved in the design of digital cards for some of the equipments. Address: 25 (A) Al-Obur Buildings Second Stage - Salah Salem Cairo–Egypt. |
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Feb2001-Present |
WebPages Design and Implementation courses instructor. Computer Networks "LAN" Design and Implementation courses instructor. |
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COMPUTER SKILLS: |
Skill |
Level |
Years practiced |
Last used |
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Paint Shop Pro 7.2 |
Expert |
More than 5 years |
1 month or less |
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Adobe Photo Shop 7.0 |
Expert |
More than 5 years |
1 month or less |
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Adobe Premiere |
Expert |
More than 5 years |
6 months or less |
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Video Studio |
Expert |
More than 5 years |
6 months or less |
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CorelDRAW 10 |
Expert |
More than 2 years |
3 months or less |
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Windows 95 |
Expert |
More than 8 years |
1 month or less |
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Windows 98 |
Expert |
More than 4 years |
1 month or less |
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Windows 2000 |
Expert |
More than 3 years |
1 month or less |
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Windows Me |
Expert |
More than 3 years |
1 month or less |
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Windows XP |
Expert |
More than 1 years |
1 month or less |
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Ms Word "XP" |
Expert |
More than 9 years |
1 month or less |
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Ms PowerPoint "XP" |
Expert |
More than 8 years |
1 month or less |
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Ms Excel "XP" |
Expert |
More than 8 years |
1 month or less |
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Ms Access "XP" |
Expert |
More than 5 years |
1 month or less |
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Ms FrontPage "XP" |
Expert |
More than 5 years |
1 month or less |
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Pascal |
Intermediate |
More than 5 years |
1 month or less |
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C++ |
Intermediate |
More than 5 years |
1 month or less |
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JavaScript |
Intermediate |
More than 2 years |
1 month or less |
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Java |
Intermediate |
1 year or less |
1 month or less |
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ATTENDED COURSES: |
Attended Microsoft courses:
Attended Sun courses:
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LANGUAGES: |
Arabic–Mother Language. English–Fluently written and spoken. |
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REFERENCES: |
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INTERESTS: |
Computers, Electronics, Photography, Graphics, Internet. |
B.Sc. Thesis Work Abstract:
In my B.Sc thesis work the following tasks were investigated and solved:
1. Brief over view of image processing methods and algorithms, especially pixel-level algorithms with special emphasis on execution speed.
2. Brief description of the ARGUS image processing workstation and its use for quality control in some industrial application.
3. Investigation of selected image processing algorithms for parallelization, discussion of the criteria of parallel execution on various hardware processing structure, i.e synchronous/asynchronous control, fine/coarse grain parallel processing arrays.
4. Application on the selected parallel algorithms to process image and evaluation of the results of experiments with images.
M.Sc Thesis Work Abstract
The grid interconnecting various processing elements in a parallel architecture appreciably influences the cost and performance of such a system. Major difficulties that can arise in such systems are message deadlock, livelock or starvation.
This work provides the foundations for the implementation of a wormhole fault-tolerant adaptive router for two-dimensional rectangular grids. It demonstrates that the adoption of virtual channels or lanes totally eliminates the possibility of message deadlock.
The work discusses a collection of routing algorithms for two-dimensional grid-structured parallel architectures. Through a detailed set of simulations, the work provides a basis for selecting one of these algorithms.
Employing a CAD workstation for field programmable gate array technology (FPGA), a partial hardware implementation of the router is achieved.
Published Paper:
Conference: ICCTA’99, 9th International Conference on Computer theory and Applications. 28-30 August 1999, Alexandria, Egypt
Paper's Title: A new routing strategy for massive parallel processing systems.
Paper's Abstract: Interconnected Networks of processors are most important in massive parallel processing systems due to the fact that machines with single processor has limited computing capabilities regardless of the technology behind it. Routers are the main element of such Interconnected Networks, in fact it might be considered as a network of routers. In this paper a survey of some routing algorithms for massively parallel computers is presented. These algorithms are studied according to a certain criteria. A new routing algorithm is developed and compared with the existing routing algorithm. Finally a simulation is done and a conclusion is driven.